| INFORMATION |
| Published : |
Sep 11, 2009 |
| Length : |
7 |
| Type : |
White Paper |
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| Overview : |
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"As the number of enhancements to various Hardware Description Languages (HDLs) has increased over the past year, so too has the complexity of determining which language is best for a particular design. Many designers and organizations are contemplating whether they should switch from one HDL to another.
This paper compares the technical characteristics of three, general-purpose HDLs:
* VHDL (IEEE-Std 1076): A general-purpose digital design language supported by multiple verification and synthesis (implementation) tools.
* Verilog (IEEE-Std 1364): A general-purpose digital design language supported by multiple verification and synthesis tools.
* SystemVerilog: An enhanced version of Verilog. As SystemVerilog is currently being defined by Accellera, there is not yet an IEEE standard." |
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